Joe Ko
41Patents
17h-index
26Co-inventors
77Inventor score
Filing activity: Mar 25, 1991 → Jan 25, 2002
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5576557A | Complementary LVTSCR ESD protection circuit for sub-micron CMOS integrated circuits | Electricity | 108 | Expired |
| US5350710A | Device for preventing antenna effect on circuit | Electricity | 96 | Expired |
| US5393701A | Layout design to eliminate process antenna effect | Emerging Cross-Sectional Technologies | 85 | Expired |
| US5821629A | Buried structure SRAM cell and methods for fabrication | Emerging Cross-Sectional Technologies | 66 | Expired |
| US6271082A | Method of fabricating a mixed circuit capacitor | Electricity | 58 | Expired |
| US5140401A | CMOS ESD protection circuit with parasitic SCR structures | Electricity | 50 | Expired |
| US5559352A | ESD protection improvement | Electricity | 49 | Expired |
| US5473169A | Complementary-SCR electrostatic discharge protection circuit | Electricity | 38 | Expired |
| US5308780A | Surface counter-doped N-LDD for high hot carrier reliability | Electricity | 33 | Expired |
| US5374565A | Method for ESD protection improvement | Electricity | 27 | Expired |
| US5565700A | Surface counter doped N-LDD for high carrier reliability | Electricity | 26 | Expired |
| US5393693A | """Bird-beak-less"" field isolation method" | Electricity | 26 | Expired |
| US5956590A | Process of forming a field effect transistor without spacer mask edge defects | Electricity | 25 | Expired |
| US6207535A | Method of forming shallow trench isolation | Emerging Cross-Sectional Technologies | 24 | Expired |
| US5460987A | Method of making field effect transistor structure of a diving channel device | Electricity | 20 | Expired |
| US5518941A | Maskless method for formation of a field implant channel stop region | Electricity | 20 | Expired |
| US5686321A | Local punchthrough stop for ultra large scale integration devices | Electricity | 18 | Expired |
| US5484743A | Self-aligned anti-punchthrough implantation process | Electricity | 16 | Expired |
| US5574302A | Field effect transistor structure of a diving channel device | Electricity | 16 | Expired |
| US5434108A | Grounding method to eliminate the antenna effect in VLSI process | Electricity | 13 | Expired |
| US5565369A | Method of making retarded DDD (double diffused drain) device structure | Electricity | 13 | Expired |
| US5514623A | Method of making layout design to eliminate process antenna effect | Emerging Cross-Sectional Technologies | 13 | Expired |
| US5817577A | Grounding method for eliminating process antenna effect | Electricity | 11 | Expired |
| US5602049A | Method of fabricating a buried structure SRAM cell | Emerging Cross-Sectional Technologies | 10 | Expired |
| US5899718A | Method for fabricating flash memory cells | Electricity | 7 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.