Inventor · Shanghai, CN

Lu Fei

15Patents

4h-index

20Co-inventors

60Inventor score

Filing activity: Oct 13, 1999 → Aug 25, 2021

Most-cited inventions

Patent	Title	Area	Cited by	Status
US8846493B2	Methods for producing silicon on insulator structures having high resistivity regions in the handle wafer	Electricity	63	Active
US8330245B2	Semiconductor wafers with reduced roll-off and bonded and unbonded SOI structures produced from same	Electricity	18	Active
US6284039A	Epitaxial silicon wafers substantially free of grown-in defects	Emerging Cross-Sectional Technologies	15	Expired
US8440541B2	Methods for reducing the width of the unbonded region in SOI structures	Electricity	6	Active
US6565649B2	Epitaxial wafer substantially free of grown-in defects	Emerging Cross-Sectional Technologies	4	Expired
US8143078B2	Methods for monitoring the amount of contamination imparted into semiconductor wafers during wafer processing	Electricity	2	Active
US10483152B2	High resistivity semiconductor-on-insulator wafer and a method of manufacturing	Electricity	1	Active
US10388529B2	Method for preparing substrate with insulated buried layer	Electricity	0	Active
US11699615B2	High resistivity semiconductor-on-insulator wafer and a method of manufacture	Electricity	0	Active
US10361114B2	Method for preparing substrate with carrier trapping center	Electricity	0	Active
US8822242B2	Methods for monitoring the amount of metal contamination in a process	Electricity	0	Active
US11139198B2	High resistivity semiconductor-on-insulator wafer and a method of manufacturing	Electricity	0	Active
US9343379B2	Method to delineate crystal related defects	Electricity	0	Active
US10529590B2	Annealing method for improving bonding strength	Electricity	0	Active
US7097718B2	Single crystal silicon wafer having an epitaxial layer substantially free from grown-in defects	Emerging Cross-Sectional Technologies	0	Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.