Ming-Yi Lee
22Patents
7h-index
36Co-inventors
65Inventor score
Filing activity: Aug 28, 1997 → Feb 2, 2015
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5851890A | Process for forming integrated circuit structure with metal silicide contacts using notched sidewall spacer on gate electrode | Electricity | 57 | Expired |
| US6613637B1 | Composite spacer scheme with low overlapped parasitic capacitance | Electricity | 20 | Expired |
| US6391768B1 | Process for CMP removal of excess trench or via filler metal which inhibits formation of concave regions on oxide surface of integrated circuit structure | Electricity | 15 | Expired |
| US6315649A | Wafer mounting plate for a polishing apparatus and method of using | Electricity | 13 | Expired |
| US7619294B1 | Shallow trench isolation structure with low trench parasitic capacitance | Electricity | 9 | Active |
| US7001823B1 | Method of manufacturing a shallow trench isolation structure with low trench parasitic capacitance | Electricity | 8 | Expired |
| US9449656B2 | Memory with bit cell header transistor | Physics | 8 | Active |
| US6737342B1 | Composite spacer scheme with low overlapped parasitic capacitance | Electricity | 7 | Expired |
| US6319836A | Planarization system | Electricity | 6 | Expired |
| US9412742B2 | Layout design for manufacturing a memory cell | Electricity | 6 | Active |
| US8226128B2 | Releasable nut-free C-clip secured pipe fitting | Mechanical Engineering; Lighting; Heating | 4 | Active |
| US6604257B1 | Apparatus and method for cleaning a conduit | Electricity | 3 | Expired |
| US8965102B2 | System and method for defect analysis of a substrate | Physics | 3 | Active |
| US6127286A | Apparatus and process for deposition of thin film on semiconductor substrate while inhibiting particle formation and deposition | Emerging Cross-Sectional Technologies | 3 | Expired |
| US6586332B1 | Deep submicron silicide blocking | Electricity | 3 | Expired |
| US8482990B2 | Memory edge cell | Physics | 2 | Active |
| US6989331B2 | Hard mask removal | Electricity | 2 | Expired |
| US9734572B2 | System and method for defect analysis of a substrate | Physics | 2 | Active |
| US6727165B1 | Fabrication of metal contacts for deep-submicron technologies | Electricity | 2 | Expired |
| US8021955B1 | Method characterizing materials for a trench isolation structure having low trench parasitic capacitance | Electricity | 1 | Active |
| US8665654B2 | Memory edge cell | Physics | 1 | Active |
| US6916700B1 | Mixed-mode process | Electricity | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.