Nader Radjy
15Patents
12h-index
13Co-inventors
71Inventor score
Filing activity: Jun 15, 1988 → Dec 6, 1997
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5598369A | Flash EEPROM array with floating substrate erase operation | Electricity | 59 | Expired |
| US5912842A | Nonvolatile PMOS two transistor memory cell and array | Electricity | 51 | Expired |
| US5561620A | Flash EEPROM array with floating substrate erase operation | Electricity | 46 | Expired |
| US5101378A | Optimized electrically erasable cell for minimum read disturb and associated method of sensing | Electricity | 45 | Expired |
| US5966329A | Apparatus and method for programming PMOS memory cells | Physics | 36 | Expired |
| US5005155A | Optimized electrically erasable PLA cell for minimum read disturb | Electricity | 32 | Expired |
| US4935648A | Optimized E.sup.2 pal cell for minimum read disturb | Electricity | 29 | Expired |
| US5191556A | Method of page-mode programming flash EEPROM cell arrays | Physics | 26 | Expired |
| US5521867A | Adjustable threshold voltage conversion circuit | Physics | 20 | Expired |
| US5576991A | Multistepped threshold convergence for a flash memory array | Physics | 15 | Expired |
| US5973372A | Silicided shallow junction transistor formation and structure with high and low breakdown voltages | Electricity | 13 | Expired |
| US5231602A | Apparatus and method for improving the endurance of floating gate devices | Physics | 13 | Expired |
| US5579261A | Reduced column leakage during programming for a flash memory array | Physics | 11 | Expired |
| US6011272A | Silicided shallow junction formation and structure with high and low breakdown voltages | Electricity | 10 | Expired |
| US5978272A | Nonvolatile memory structure for programmable logic devices | Physics | 10 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.