Harry J. Levinson
78Patents
19h-index
44Co-inventors
84Inventor score
Filing activity: Apr 30, 1985 → Aug 16, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6716571B2 | Selective photoresist hardening to facilitate lateral trimming | Emerging Cross-Sectional Technologies | 515 | Expired |
| US6184128A | Method using a thin resist mask for dual damascene stop layer etch | Electricity | 74 | Expired |
| US6020269A | Ultra-thin resist and nitride/oxide hard mask for metal etch | Electricity | 65 | Expired |
| US6098408A | System for controlling reflection reticle temperature in microlithography | Emerging Cross-Sectional Technologies | 50 | Expired |
| US6440640B1 | Thin resist with transition metal hard mask for via etch application | Electricity | 43 | Expired |
| US6623893B1 | Pellicle for use in EUV lithography and a method of making such a pellicle | Physics | 43 | Expired |
| US6165695A | Thin resist with amorphous silicon hard mask for via etch application | Emerging Cross-Sectional Technologies | 41 | Expired |
| US6309926A | Thin resist with nitride hard mask for gate etch application | Electricity | 39 | Expired |
| US6178221A | Lithography reflective mask | Physics | 38 | Expired |
| US7315033B1 | Method and apparatus for reducing biological contamination in an immersion lithography system | Physics | 38 | Expired |
| US6127070A | Thin resist with nitride hard mask for via etch application | Electricity | 32 | Expired |
| US8741763B2 | Layout designs with via routing structures | Electricity | 32 | Active |
| US8954913B1 | Methods of generating circuit layouts that are to be manufactured using SADP routing techniques and virtual non-mandrel mask rules | Physics | 30 | Active |
| US6645679B1 | Attenuated phase shift mask for use in EUV lithography and a method of making such a mask | Physics | 24 | Expired |
| US6159643A | Extreme ultraviolet lithography reflective mask | Physics | 23 | Expired |
| US6306560A | Ultra-thin resist and SiON/oxide hard mask for metal etch | Electricity | 22 | Expired |
| US6200907A | Ultra-thin resist and barrier metal/oxide hard mask for metal etch | Electricity | 20 | Expired |
| US6057206A | Mark protection scheme with no masking | Electricity | 20 | Expired |
| US6171763A | Ultra-thin resist and oxide/nitride hard mask for metal etch | Electricity | 19 | Expired |
| US7061578B2 | Method and apparatus for monitoring and controlling imaging in immersion lithography systems | Physics | 18 | Expired |
| US6140023A | Method for transferring patterns created by lithography | Physics | 18 | Expired |
| US8921225B2 | Method for off-grid routing structures utilizing self aligned double patterning (SADP) technology | Electricity | 18 | Active |
| US5748323A | Method and apparatus for wafer-focusing | Physics | 18 | Expired |
| US6162587A | Thin resist with transition metal hard mask for via etch application | Electricity | 18 | Expired |
| US6984475B1 | Extreme ultraviolet (EUV) lithography masks | Physics | 17 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.