Robert Tamlyn
17Patents
9h-index
32Co-inventors
72Inventor score
Filing activity: May 16, 1989 → Oct 25, 2012
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5001672A | Video ram with external select of active serial access register | Physics | 101 | Expired |
| US5978281A | Method and apparatus for preventing postamble corruption within a memory system | Physics | 55 | Expired |
| US5490114A | High performance extended data out | Physics | 37 | Expired |
| US5319606A | Blocked flash write in dynamic RAM devices | Physics | 32 | Expired |
| US6009026A | Compressed input/output test mode | Physics | 28 | Expired |
| US5065368A | Video RAM double buffer select control | Physics | 24 | Expired |
| US4984214A | Multiplexed serial register architecture for VRAM | Physics | 23 | Expired |
| US5257237A | SAM data selection on dual-ported DRAM devices | Physics | 17 | Expired |
| US5606269A | Non-delay based address transition detector (ATD) | Electricity | 9 | Expired |
| US8630141B2 | Circuits and methods for providing refresh addresses and alternate refresh addresses to be refreshed | Physics | 9 | Active |
| US5392241A | Semiconductor memory circuit with block overwrite | Physics | 9 | Expired |
| US7849349B2 | Reduced-delay clocked logic | Electricity | 8 | Active |
| US5532970A | No latency pipeline | Physics | 6 | Expired |
| US7203127B1 | Apparatus and method for dynamically controlling data transfer in memory device | Physics | 5 | Expired |
| US5901093A | Redundancy architecture and method for block write access cycles permitting defective memory line replacement | Physics | 4 | Expired |
| US8913448B2 | Apparatuses and methods for capturing data in a memory | Physics | 3 | Active |
| US5278800A | Memory system and unique memory chip allowing island interlace | Physics | 1 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.