Inventor · Milpitas, CA, US

Sunil Srinivasan

24Patents
10h-index
41Co-inventors
71Inventor score

Filing activity: Aug 6, 2007 → Nov 10, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US10555412B2 Method of controlling ion energy distribution using a pulse generator with a current-return output stage Electricity 55 Active
US10448494B1 Method of controlling ion energy distribution using a pulse generator with a current-return output stage Electricity 53 Active
US10791617B2 Method of controlling ion energy distribution using a pulse generator with a current-return output stage Electricity 51 Active
US10448495B1 Method of controlling ion energy distribution using a pulse generator with a current-return output stage Electricity 45 Active
USD797691S1 Composite edge ring General 45 Active
US9947517B1 Adjustable extended electrode for edge uniformity control Electricity 36 Active
US10103010B2 Adjustable extended electrode for edge uniformity control Electricity 32 Active
US10553404B2 Adjustable extended electrode for edge uniformity control Electricity 13 Active
US11284500B2 Method of controlling ion energy distribution using a pulse generator Electricity 12 Active
US10504702B2 Adjustable extended electrode for edge uniformity control Electricity 12 Active
US10991556B2 Adjustable extended electrode for edge uniformity control Electricity 10 Active
US8133817B2 Shallow trench isolation etch process Electricity 6 Active
US11393710B2 Wafer edge ring lifting solution Electricity 5 Active
US11087989B1 Cryogenic atomic layer etch with noble gases Electricity 2 Active
US11515166B2 Cryogenic atomic layer etch with noble gases Electricity 1 Active
US12094752B2 Wafer edge ring lifting solution Electricity 1 Active
US8747684B2 Multi-film stack etching with polymer passivation of an overlying etched layer Electricity 0 Active
US11521849B2 In-situ deposition process Electricity 0 Active
US12237149B2 Reducing aspect ratio dependent etch with direct current bias pulsing Electricity 0 Active
US11521838B2 Integrated cleaning process for substrate etching Electricity 0 Active
US12255055B2 Integrated cleaning process for substrate etching Electricity 0 Active
US11996294B2 Cryogenic atomic layer etch with noble gases Electricity 0 Active
US8187483B2 Method to minimize CD etch bias Physics 0 Active
US11049760B2 Universal process kit Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.