Vinay Prabhakar
31Patents
4h-index
59Co-inventors
62Inventor score
Filing activity: Dec 8, 2009 → May 26, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8172992B2 | Wafer electroplating apparatus for reducing edge defects | Chemistry; Metallurgy | 21 | Active |
| US9324598B2 | Substrate processing system and method | Emerging Cross-Sectional Technologies | 6 | Active |
| US9318332B2 | Grid for plasma ion implant | Emerging Cross-Sectional Technologies | 4 | Active |
| US11670492B2 | Chamber configurations and processes for particle control | Electricity | 4 | Active |
| US9543114B2 | Implant masking and alignment system with rollers | Electricity | 3 | Active |
| US10276364B2 | Bevel etch profile control | Electricity | 3 | Active |
| US9875922B2 | Substrate processing system and method | Emerging Cross-Sectional Technologies | 2 | Active |
| US11584994B2 | Pedestal for substrate processing chambers | Electricity | 1 | Active |
| US10629427B2 | Bevel etch profile control | Electricity | 1 | Active |
| US11600470B2 | Targeted heat control systems | Electricity | 1 | Active |
| US12266550B2 | Multiple process semiconductor processing system | Electricity | 0 | Active |
| US11984305B2 | Substrate pedestal for improved substrate processing | Electricity | 0 | Active |
| US11515176B2 | Thermally controlled lid stack components | Electricity | 0 | Active |
| US10923334B2 | Selective deposition of hardmask | Electricity | 0 | Active |
| US11875969B2 | Process chamber with reduced plasma arc | Electricity | 0 | Active |
| US11532463B2 | Semiconductor processing chamber and methods for cleaning the same | Electricity | 0 | Active |
| US11569072B2 | RF grounding configuration for pedestals | Electricity | 0 | Active |
| US12211728B2 | Electrostatic chuck design with improved chucking and arcing performance | Electricity | 0 | Active |
| US9583661B2 | Grid for plasma ion implant | Emerging Cross-Sectional Technologies | 0 | Active |
| US10599043B2 | Critical methodology in vacuum chambers to determine gap and leveling between wafer and hardware components | Electricity | 0 | Active |
| US11560623B2 | Methods of reducing chamber residues | Chemistry; Metallurgy | 0 | Active |
| US11587773B2 | Substrate pedestal for improved substrate processing | Electricity | 0 | Active |
| US12191115B2 | Dual RF for controllable film deposition | Electricity | 0 | Active |
| US12424414B2 | Semiconductor processing system with a manifold for equal splitting and common divert architecture | Electricity | 0 | Active |
| US11515129B2 | Radiation shield modification for improving substrate temperature uniformity | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.