Inventor · Hopewell Junction, NY, US

Anda C. Mocuta

28Patents
12h-index
66Co-inventors
80Inventor score

Filing activity: Nov 21, 2000 → Jan 6, 2014

Most-cited inventions

PatentTitleAreaCited byStatus
US6916698B2 High performance CMOS device structure with mid-gap metal gate Electricity 133 Expired
US7723750B2 MOSFET with super-steep retrograded island Electricity 124 Active
US6881635B1 Strained silicon NMOS devices with embedded source/drain Electricity 102 Expired
US6762469B2 High performance CMOS device structure with mid-gap metal gate Electricity 60 Expired
US7705345B2 High performance strained silicon FinFETs device and method for forming same Electricity 46 Expired
US7067400B2 Method for preventing sidewall consumption during oxidation of SGOI islands Emerging Cross-Sectional Technologies 46 Expired
US6303450A CMOS device structures and method of making same Electricity 37 Expired
US6746924B1 Method of forming asymmetric extension mosfet using a drain side spacer Electricity 28 Expired
US8626480B2 Compact model for device/circuit/chip leakage current (IDDQ) calculation including process induced uplift factors Physics 18 Active
US7056782B2 CMOS silicide metal gate integration Electricity 15 Expired
US6509241B2 Process for fabricating an MOS device having highly-localized halo regions Electricity 14 Expired
US7268049B2 Structure and method for manufacturing MOSFET with super-steep retrograded island Electricity 14 Expired
US7560326B2 Silicon/silcion germaninum/silicon body device with embedded carbon dopant Electricity 12 Active
US7691698B2 Pseudomorphic Si/SiGe/Si body device with embedded SiGe source/drain Electricity 8 Active
US6635517B2 Use of disposable spacer to introduce gettering in SOI layer Electricity 6 Expired
US7411227B2 CMOS silicide metal gate integration Electricity 5 Expired
US7879650B2 Method of providing protection against charging damage in hybrid orientation transistors Electricity 3 Active
US7655557B2 CMOS silicide metal gate integration Electricity 3 Active
US8239790B2 Methods and system for analysis and management of parametric yield Physics 3 Active
US8042070B2 Methods and system for analysis and management of parametric yield Physics 2 Active
US8168971B2 Pseudomorphic Si/SiGe/Si body device with embedded SiGe source/drain Electricity 1 Active
US8754412B2 Intra die variation monitor using through-silicon via Electricity 1 Active
US9639652B2 Compact model for device/circuit/chip leakage current (IDDQ) calculation including process induced uplift factors Physics 1 Active
US8429576B2 Methods and system for analysis and management of parametric yield Physics 1 Active
US7928513B2 Protection against charging damage in hybrid orientation transistors Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.