Jean Jimenez
33Patents
7h-index
13Co-inventors
66Inventor score
Filing activity: Sep 23, 1992 → Sep 9, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5515225A | Integrated circuit protected against electrostatic overvoltages | Electricity | 20 | Expired |
| US9019666B2 | Electronic device, in particular for protection against electrostatic discharges, and method for protecting a component against electrostatic discharges | Electricity | 19 | Active |
| US6153453A | JFET transistor manufacturing method | Electricity | 17 | Expired |
| US5432368A | Pad protection diode structure | Electricity | 14 | Expired |
| US5567977A | Precision integrated resistor | Electricity | 12 | Expired |
| US5357126A | MOS transistor with an integrated protection zener diode | Electricity | 10 | Expired |
| US9401351B2 | Electronic device for ESD protection | Electricity | 8 | Active |
| US5801078A | Method for manufacturing diffused channel insulated gate effect transistor | Electricity | 7 | Expired |
| US5422298A | Method of manufacturing a precision integrated resistor | Electricity | 7 | Expired |
| US5336920A | Buried avalanche diode having laterally adjacent semiconductor layers | Electricity | 7 | Expired |
| US5646433A | Pad protection diode structure | Electricity | 5 | Expired |
| US9159402B2 | SRAM bitcell implemented in double gate technology | Physics | 4 | Active |
| US9159413B2 | Thermo programmable resistor based ROM | Physics | 3 | Active |
| US8907373B2 | Electronic device for protecting from electrostatic discharge | Electricity | 2 | Active |
| US5543358A | Method for forming thin and thick metal layers | Electricity | 2 | Expired |
| US9997512B2 | Electronic device for ESD protection | Electricity | 2 | Active |
| US8829620B2 | Transistor with adjustable supply and/or threshold voltage | Electricity | 2 | Active |
| US8847275B2 | Electronic device for protection against electrostatic discharges, with a concentric structure | Electricity | 1 | Active |
| US9368611B2 | Integrated circuit comprising a MOS transistor having a sigmoid response and corresponding method of fabrication | Electricity | 1 | Active |
| US8610216B2 | Structure for protecting an integrated circuit against electrostatic discharges | Electricity | 1 | Active |
| US10361188B2 | Method for fabricating a JFET transistor within an integrated circuit and corresponding integrated circuit | Electricity | 0 | Active |
| US11658479B2 | Low leakage MOSFET supply clamp for electrostatic discharge (ESD) protection | Electricity | 0 | Active |
| US11063429B2 | Low leakage MOSFET supply clamp for electrostatic discharge (ESD) protection | Electricity | 0 | Active |
| US9455247B2 | High-performance device for protection from electrostatic discharge | Electricity | 0 | Active |
| US9899366B2 | Electronic device, in particular for protection against overvoltages | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.