Marc R. Faucher
30Patents
12h-index
46Co-inventors
81Inventor score
Filing activity: May 29, 1992 → Oct 19, 2017
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5963464A | Stackable memory card | Physics | 161 | Expired |
| US5459842A | System for combining data from multiple CPU write requests via buffers and using read-modify-write operation to write the combined data to the memory | Physics | 126 | Expired |
| US6185718A | Memory card design with parity and ECC for non-parity and non-ECC systems | Physics | 66 | Expired |
| US5404543A | Method and system for reducing an amount of power utilized by selecting a lowest power mode from a plurality of power modes | Emerging Cross-Sectional Technologies | 62 | Expired |
| US6092146A | Dynamically configurable memory adapter using electronic presence detects | Physics | 52 | Expired |
| US6532520B1 | Method and apparatus for allocating data and instructions within a shared cache | Physics | 34 | Expired |
| US6052818A | Method and apparatus for ECC bus protection in a computer system with non-parity memory | Physics | 32 | Expired |
| US6108730A | Memory card adapter insertable into a motherboard memory card socket comprising a memory card receiving socket having the same configuration as the motherboard memory card socket | Physics | 28 | Expired |
| US5959845A | Universal chip carrier connector | Emerging Cross-Sectional Technologies | 22 | Expired |
| US5448521A | Connecting a short word length non-volatile memory to a long word length address/data multiplexed bus | Physics | 17 | Expired |
| US5548746A | Non-contiguous mapping of I/O addresses to use page protection of a process | Physics | 14 | Expired |
| US6457155B1 | Method for making a memory card adapter insertable into a motherboard memory card socket comprising a memory card receiving socket having the same configuration as the motherboard memory card socket | Physics | 14 | Expired |
| US7962695B2 | Method and system for integrating SRAM and DRAM architecture in set associative cache | Physics | 11 | Active |
| US6178467A | Microprocessor system requests burstable access to noncacheable memory areas and transfers noncacheable address on a bus at burst mode | Physics | 9 | Expired |
| US7526698B2 | Error detection and correction in semiconductor structures | Electricity | 7 | Active |
| US6578155B1 | Data processing system with adjustable clocks for partitioned synchronous interfaces | Physics | 6 | Expired |
| US5969997A | Narrow data width DRAM with low latency page-hit operations | Physics | 4 | Expired |
| US8244880B2 | Connection management method, system, and program product | Electricity | 2 | Active |
| US10527645B2 | Compact probe for atomic-force microscopy and atomic-force microscope including such a probe | Physics | 2 | Active |
| US7882302B2 | Method and system for implementing prioritized refresh of DRAM based cache | Emerging Cross-Sectional Technologies | 1 | Active |
| US8091143B2 | Atomic force microscopy probe | Physics | 1 | Active |
| US10302673B2 | Miniaturized and compact probe for atomic force microscopy | Physics | 1 | Active |
| US8146046B2 | Structures for semiconductor structures with error detection and correction | Electricity | 0 | Active |
| US11099205B2 | Prestrained vibrating accelerometer | Physics | 0 | Active |
| US8019970B2 | Three-dimensional networking design structure | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.