Dirk Brown
38Patents
24h-index
31Co-inventors
85Inventor score
Filing activity: Mar 6, 1998 → Nov 22, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8963926B2 | User customized animated video and method for making the same | Electricity | 423 | Active |
| US6144099A | Semiconductor metalization barrier | Electricity | 279 | Expired |
| US6344410B1 | Manufacturing method for semiconductor metalization barrier | Electricity | 248 | Expired |
| US6712621B2 | Thermally enhanced interposer and method | Electricity | 88 | Expired |
| US6124203A | Method for forming conformal barrier layers | Electricity | 87 | Expired |
| US6022808A | Copper interconnect methodology for enhanced electromigration resistance | Electricity | 74 | Expired |
| US6172895A | High capacity memory module with built-in-high-speed bus terminations | Physics | 70 | Expired |
| US7628617B2 | Structure and process for a contact grid array formed in a circuitized substrate | Electricity | 65 | Active |
| US7070419B2 | Land grid array connector including heterogeneous contact elements | Electricity | 61 | Expired |
| US7758351B2 | Method and system for batch manufacturing of spring elements | Electricity | 55 | Active |
| US6228754A | Method for forming semiconductor seed layers by inert gas sputter etching | Electricity | 51 | Expired |
| US6916181B2 | Remountable connector for land grid array packages | Electricity | 40 | Expired |
| US7244125B2 | Connector for making electrical contact at semiconductor scales | Electricity | 39 | Expired |
| US6103624A | Method of improving Cu damascene interconnect reliability by laser anneal before barrier polish | Electricity | 38 | Expired |
| US6306732A | Method and apparatus for simultaneously improving the electromigration reliability and resistance of damascene vias using a controlled diffusivity barrier | Emerging Cross-Sectional Technologies | 37 | Expired |
| US6239021A | Dual barrier and conductor deposition in a dual damascene process for semiconductors | Emerging Cross-Sectional Technologies | 32 | Expired |
| US6117770A | Method for implanting semiconductor conductive layers | Electricity | 31 | Expired |
| US6869290B2 | Circuitized connector for land grid array | Electricity | 28 | Expired |
| US6281121A | Damascene metal interconnects using highly directional deposition of barrier and/or seed layers including (III) filling metal | Electricity | 27 | Expired |
| US6261946A | Method for forming semiconductor seed layers by high bias deposition | Electricity | 27 | Expired |
| US7113408B2 | Contact grid array formed on a printed circuit board | Electricity | 26 | Expired |
| US6121141A | Method of forming a void free copper interconnects | Electricity | 25 | Expired |
| US6734559B1 | Self-aligned semiconductor interconnect barrier and manufacturing method therefor | Electricity | 24 | Expired |
| US6712620B1 | Coaxial elastomeric connector system | Emerging Cross-Sectional Technologies | 24 | Expired |
| US6187670A | Multi-stage method for forming optimized semiconductor seed layers | Electricity | 23 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.