Inventor · Powell River, BC, CA

Jean Audet

37Patents
5h-index
61Co-inventors
72Inventor score

Filing activity: May 19, 2000 → Apr 17, 2020

Most-cited inventions

PatentTitleAreaCited byStatus
US7268570B1 Apparatus and method for customized burn-in of cores on a multicore microprocessor integrated circuit chip Physics 14 Active
US10784202B2 High-density chip-to-chip interconnection with silicon bridge Electricity 13 Active
US7420378B2 Power grid structure to optimize performance of a multiple core processor Emerging Cross-Sectional Technologies 9 Active
US6762367B2 Electronic package having high density signal wires with low resistance Electricity 7 Expired
US9443799B2 Interposer with lattice construction and embedded conductive metal structures Electricity 6 Active
US7017128B2 Concurrent electrical signal wiring optimization for an electronic package Electricity 5 Expired
US6703706B2 Concurrent electrical signal wiring optimization for an electronic package Electricity 5 Expired
US7066740B2 Area array package with low inductance connecting device Emerging Cross-Sectional Technologies 4 Expired
US9553079B1 Flip chip assembly with connected component Electricity 4 Active
US7454833B2 High performance chip carrier substrate Emerging Cross-Sectional Technologies 4 Active
US8841209B2 Method for forming coreless flip chip ball grid array (FCBGA) substrates and such substrates formed by the method Electricity 3 Active
US9673064B2 Interposer with lattice construction and embedded conductive metal structures Electricity 3 Active
US7214886B2 High performance chip carrier substrate Emerging Cross-Sectional Technologies 3 Expired
US11209598B2 Photonics package with face-to-face bonding Electricity 2 Active
US7667470B2 Power grid structure to optimize performance of a multiple core processor Emerging Cross-Sectional Technologies 2 Active
US10211174B2 Flip chip assembly with connected component Electricity 2 Active
US7482180B1 Method for determining the impact of layer thicknesses on laminate warpage Electricity 2 Active
US7863526B2 High performance chip carrier substrate Emerging Cross-Sectional Technologies 1 Active
US7786579B2 Apparatus for crack prevention in integrated circuit packages Electricity 1 Active
US7868459B2 Semiconductor package having non-aligned active vias Electricity 1 Active
US10460956B2 Interposer with lattice construction and embedded conductive metal structures Electricity 1 Active
US10622299B2 Multi terminal capacitor within input output path of semiconductor package interconnect Electricity 1 Active
US7312523B2 Enhanced via structure for organic module performance Electricity 1 Expired
US10660209B2 Thin film capacitors for core and adjacent build up layers Electricity 0 Active
US10706204B2 Automated generation of surface-mount package design Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.