Hideaki Arima
59Patents
21h-index
31Co-inventors
88Inventor score
Filing activity: Jun 4, 1982 → Jan 25, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5763921A | Semiconductor device including retrograde well structure with suppressed substrate bias effects | Electricity | 131 | Expired |
| US5049975A | Multi-layered interconnection structure for a semiconductor device | Emerging Cross-Sectional Technologies | 120 | Expired |
| US5049516A | Method of manufacturing semiconductor memory device | Physics | 62 | Expired |
| US5101250A | Electrically programmable non-volatile memory device and manufacturing method thereof | Electricity | 62 | Expired |
| US5051948A | Content addressable memory device | Physics | 59 | Expired |
| US4465529A | Method of producing semiconductor device | Electricity | 53 | Expired |
| US5162262A | Multi-layered interconnection structure for a semiconductor device and manufactured method thereof | Emerging Cross-Sectional Technologies | 51 | Expired |
| US5523596A | Semiconductor device having capacitor and manufacturing method therefor | Emerging Cross-Sectional Technologies | 39 | Expired |
| US5378643A | Electrically programmable non-volatile semiconductor memory device and manufacturing method thereof | Electricity | 36 | Expired |
| US5194925A | Electrically programmable non-volatie semiconductor memory device | Electricity | 35 | Expired |
| US5480826A | Method of manufacturing semiconductor device having a capacitor | Electricity | 33 | Expired |
| US5428239A | Semiconductor device having retrograde well and diffusion-type well | Electricity | 33 | Expired |
| US5141891A | MIS-type semiconductor device of LDD structure and manufacturing method thereof | Electricity | 33 | Expired |
| US5381365A | Dynamic random access memory having stacked type capacitor and manufacturing method therefor | Electricity | 31 | Expired |
| US5218219A | Semiconductor memory device having a peripheral wall at the boundary region of a memory cell array region and a peripheral circuit region | Electricity | 29 | Expired |
| US6194758A | Semiconductor device comprising capacitor and method of fabricating the same | Electricity | 29 | Expired |
| US5229314A | Method of manufacturing field effect transistor having a multilayer interconnection layer therein with tapered sidewall insulation | Electricity | 27 | Expired |
| US5486712A | DRAM having peripheral circuitry in which source-drain interconnection contact of a MOS transistor is made small by utilizing a pad layer and manufacturing method thereof | Emerging Cross-Sectional Technologies | 25 | Expired |
| US5612241A | Method of manufacturing a DRAM having peripheral circuitry in which source drain interconnection contact of a MOS transistor is made small by utilizing a pad layer | Emerging Cross-Sectional Technologies | 24 | Expired |
| US4988635A | Method of manufacturing non-volatile semiconductor memory device | Electricity | 22 | Expired |
| US5364811A | Method of manufacturing a semiconductor memory device with multiple device forming regions | Electricity | 22 | Expired |
| US6066881A | Integrated circuit having a memory cell transistor with a gate oxide layer which is thicker than the gate oxide layer of a peripheral circuit transistor | Electricity | 21 | Expired |
| US5672533A | Field effect transistor having impurity regions of different depths and manufacturing method thereof | Electricity | 21 | Expired |
| US5597755A | Method of manufacturing a stacked capacitor in a dram | Electricity | 21 | Expired |
| US4907198A | Semiconductor memory device | Physics | 19 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.