Linlin Liu
31Patents
8h-index
20Co-inventors
71Inventor score
Filing activity: Feb 17, 2004 → May 25, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7084475B2 | Lateral conduction Schottky diode with plural mesas | Electricity | 78 | Expired |
| US8633094B2 | GaN high voltage HFET with passivation plus gate dielectric multilayer structure | Electricity | 25 | Active |
| US7863172B2 | Gallium nitride semiconductor device | Electricity | 22 | Active |
| US7229866B2 | Non-activated guard ring for semiconductor devices | Electricity | 16 | Expired |
| US9306014B1 | High-electron-mobility transistors | Electricity | 15 | Active |
| US9722063B1 | Protective insulator for HFET devices | Electricity | 14 | Active |
| US8507947B2 | High quality GaN high-voltage HFETS on silicon | Electricity | 8 | Active |
| US7253015B2 | Low doped layer for nitride-based semiconductor device | Electricity | 8 | Expired |
| US7439599B2 | PIN photodiode structure and fabrication process for reducing dielectric delamination | Electricity | 7 | Expired |
| US8319256B2 | Layout design for a high power, GaN-based FET | Electricity | 7 | Active |
| US7436039B2 | Gallium nitride semiconductor device | Electricity | 4 | Expired |
| US10204791B1 | Contact plug for high-voltage devices | Electricity | 2 | Active |
| US7518240B2 | Deposition pattern for eliminating backside metal peeling during die separation in semiconductor device fabrication | Electricity | 2 | Active |
| US8703561B2 | High quality GaN high-voltage HFETs on silicon | Electricity | 2 | Active |
| US10665463B2 | Asymmetrical plug technique for GaN devices | Electricity | 2 | Active |
| US10121885B2 | Protective insulator for HFET devices | Electricity | 2 | Active |
| US10629719B2 | Protective insulator for HFET devices | Electricity | 2 | Active |
| US9147734B2 | High quality GaN high-voltage HFETs on silicon | Electricity | 1 | Active |
| US8022495B2 | PIN diode structure with zinc diffusion region | Electricity | 1 | Active |
| US7538403B2 | PIN diode structure with zinc diffusion region | Electricity | 1 | Active |
| US8530903B2 | Layout design for a high power, GaN-based FET having interdigitated electrodes | Electricity | 1 | Active |
| US7198988B1 | Method for eliminating backside metal peeling during die separation | Electricity | 1 | Expired |
| US11075294B2 | Protective insulator for HFET devices | Electricity | 1 | Active |
| US11373873B2 | Asymmetrical plug technique for GaN devices | Electricity | 1 | Active |
| US9525055B2 | High-electron-mobility transistors | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.