Nicky C. Lu
29Patents
21h-index
22Co-inventors
85Inventor score
Filing activity: Nov 19, 1984 → May 15, 2017
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5021355A | Method of fabricating cross-point lightly-doped drain-source trench transistor | Electricity | 168 | Expired |
| US5107459A | Stacked bit-line architecture for high density cross-point memory cell array | Physics | 128 | Expired |
| US4881105A | Integrated trench-transistor structure and fabrication process | Electricity | 89 | Expired |
| US4649625A | Dynamic memory device having a single-crystal transistor on a trench capacitor structure and a fabrication method therefor | Electricity | 88 | Expired |
| US4922128A | Boost clock circuit for driving redundant wordlines and sample wordlines | Physics | 81 | Expired |
| US4954854A | Cross-point lightly-doped drain-source trench transistor and fabrication process therefor | Electricity | 81 | Expired |
| US4688063A | Dynamic ram cell with MOS trench capacitor in CMOS | Electricity | 72 | Expired |
| US4833516A | High density memory cell structure having a vertical trench transistor self-aligned with a vertical trench capacitor and fabrication methods therefor | Electricity | 70 | Expired |
| US4983544A | Silicide bridge contact process | Emerging Cross-Sectional Technologies | 65 | Expired |
| US4728623A | Fabrication method for forming a self-aligned contact window and connection in an epitaxial layer and device structures employing the method | Electricity | 64 | Expired |
| US4816706A | Sense amplifier with improved bitline precharging for dynamic random access memory | Physics | 55 | Expired |
| US4910709A | Complementary metal-oxide-semiconductor transistor and one-capacitor dynamic-random-access memory cell | Electricity | 48 | Expired |
| US5198995A | Trench-capacitor-one-transistor storage cell and array for dynamic random access memories | Electricity | 47 | Expired |
| US4816884A | High density vertical trench transistor and capacitor memory cell structure and fabrication method therefor | Electricity | 42 | Expired |
| US6009023A | High performance DRAM structure employing multiple thickness gate oxide | Electricity | 36 | Expired |
| US4927779A | Complementary metal-oxide-semiconductor transistor and one-capacitor dynamic-random-access memory cell and fabrication process therefor | Electricity | 34 | Expired |
| US4754433A | Dynamic ram having multiplexed twin I/O line pairs | Physics | 33 | Expired |
| US5395784A | Method of manufacturing low leakage and long retention time DRAM | Electricity | 28 | Expired |
| US6107134A | High performance DRAM structure employing multiple thickness gate oxide | Electricity | 28 | Expired |
| US4639622A | Boosting word-line clock circuit for semiconductor memory | Physics | 26 | Expired |
| US4678941A | Boost word-line clock and decoder-driver circuits in semiconductor memories | Physics | 24 | Expired |
| US4954731A | Wordline voltage boosting circuits for complementary MOSFET dynamic memories | Electricity | 20 | Expired |
| US6097641A | High performance DRAM structure employing multiple thickness gate oxide | Electricity | 6 | Expired |
| US6163047A | Method of fabricating a self aligned contact for a capacitor over bitline, (COB), memory cell | Electricity | 5 | Expired |
| US9164942B2 | High speed memory chip module and electronics system device with a high speed memory chip module | Emerging Cross-Sectional Technologies | 2 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.