Su-Jin Ahn
30Patents
8h-index
62Co-inventors
74Inventor score
Filing activity: Sep 5, 2002 → Jun 16, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7440308B2 | Phase-change random access memory device and method of operating the same | Physics | 78 | Active |
| US7042760B2 | Phase-change memory and method having restore function | Physics | 39 | Expired |
| US7149103B2 | Set programming methods and write driver circuits for a phase-change memory array | Physics | 30 | Expired |
| US7482616B2 | Semiconductor devices having phase change memory cells, electronic systems employing the same and methods of fabricating the same | Electricity | 29 | Expired |
| US9595346B2 | 3-Dimensional semiconductor memory device and operating method thereof | Electricity | 19 | Active |
| US7411208B2 | Phase-change memory device having a barrier layer and manufacturing method | Electricity | 14 | Expired |
| US10242997B2 | Vertical memory devices | Electricity | 10 | Active |
| US7282761B2 | Semiconductor memory devices having offset transistors and methods of fabricating the same | Electricity | 9 | Expired |
| US8026543B2 | Semiconductor devices having phase change memory cells, electronic systems employing the same and methods of fabricating the same | Electricity | 7 | Active |
| US9007819B2 | Magnetic random access memory device and method of writing data therein | Physics | 6 | Active |
| US7309885B2 | PRAMs having a plurality of active regions located vertically in sequence and methods of forming the same | Electricity | 6 | Expired |
| US7480167B2 | Set programming methods and write driver circuits for a phase-change memory array | Physics | 5 | Active |
| US7105870B2 | Phase-changeable memory devices | Electricity | 5 | Expired |
| US6882561B2 | Semiconductor memory device comprising memory having active restoration function | Physics | 4 | Expired |
| US7521281B2 | Methods of forming phase-changeable memory devices | Electricity | 3 | Active |
| US7419909B2 | Methods of forming a semiconductor device that allow patterns in different regions that have different pitches to be connected | Electricity | 3 | Active |
| US6949783B2 | Memory cell transistor having different source/drain junction profiles connected to DC node and BC node and manufacturing method thereof | Electricity | 2 | Expired |
| US8709834B2 | Methods of fabricating semiconductor device | Electricity | 1 | Active |
| US7989869B2 | Non-volatile memory devices having improved operational characteristics | Electricity | 1 | Active |
| US7479405B2 | PRAMS having a plurality of active regions located vertically in sequence and methods of forming the same | Electricity | 1 | Active |
| US11217318B2 | Non-volatile memory device and program method of a non-volatile memory device | Physics | 1 | Active |
| US8610192B2 | Non-volatile memory devices having charge storage layers at intersecting locations of word lines and active regions | Electricity | 0 | Active |
| US10700092B2 | Vertical semiconductor devices and methods of manufacturing the same | Electricity | 0 | Active |
| US10367002B2 | Vertical semiconductor devices and methods of manufacturing the same | Electricity | 0 | Active |
| US6903409B2 | Semiconductor devices with scalable two transistor memory cells | Electricity | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.