Inventor · Los Altos, CA, US

Thomas E. Harrington, III

37Patents
10h-index
29Co-inventors
75Inventor score

Filing activity: Apr 29, 1988 → Nov 8, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US6306718A Method of making polysilicon resistor having adjustable temperature coefficients Electricity 41 Expired
US4943537A CMOS integrated circuit with reduced susceptibility to PMOS punchthrough Electricity 38 Expired
US5181091A Integrated circuit with improved protection against negative transients Electricity 35 Expired
US4950620A Process for making integrated circuit with doped silicon dioxide load elements Emerging Cross-Sectional Technologies 33 Expired
US5122474A Method of fabricating a CMOS IC with reduced susceptibility to PMOS punchthrough Electricity 31 Expired
US4906588A Enclosed buried channel transistor Electricity 25 Expired
US4980746A Integrated circuit with improved battery protection Electricity 23 Expired
US4862310A Low leakage battery protection diode structure Electricity 21 Expired
US5688722A CMOS integrated circuit with reduced susceptibility to PMOS punchthrough Electricity 14 Expired
US5682051A CMOS integrated circuit with reduced susceptibility to PMOS punchthrough Electricity 12 Expired
US7376619B1 Method and system for rapid tenant screening, lease recommendation, and automatic conversion/transcription of data into lease documents Physics 10 Expired
US5159426A Integrated circuit with improved battery protection Electricity 7 Expired
US9117899B2 Device architecture and method for improved packing of vertical field effect devices Electricity 3 Active
US9806186B2 Termination region architecture for vertical power transistors Electricity 2 Active
US9755058B2 Surface devices within a vertical power device Electricity 2 Active
US10074735B2 Surface devices within a vertical power device Electricity 1 Active
US11190854B2 Content-modification system with client-side advertisement caching Electricity 1 Active
US9496386B2 Device architecture and method for improved packing of vertical field effect devices Electricity 1 Active
US10580884B2 Super junction MOS bipolar transistor having drain gaps Electricity 1 Active
US12159909B2 Power semiconductor device with reduced strain Electricity 0 Active
US10134890B2 Termination region architecture for vertical power transistors Electricity 0 Active
US8987778B1 On-chip electrostatic discharge protection for a semiconductor device Electricity 0 Active
US12376332B2 Edge termination structures for semiconductor devices Electricity 0 Active
US11985393B2 Content-modification system with client-side advertisement caching Electricity 0 Active
US11769828B2 Gate trench power semiconductor devices having improved deep shield connection patterns Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.