Wilfried E. Haensch
97Patents
17h-index
90Co-inventors
87Inventor score
Filing activity: Nov 22, 1996 → Apr 30, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7923337B2 | Fin field effect transistor devices with self-aligned source and drain regions | Emerging Cross-Sectional Technologies | 216 | Active |
| US7089515B2 | Threshold voltage roll-off compensation using back-gated MOSFET devices for system high-performance and low standby power | Electricity | 127 | Expired |
| US7750682B2 | CMOS back-gated keeper technique | Electricity | 120 | Active |
| US7989900B2 | Semiconductor structure including gate electrode having laterally variable work function | Electricity | 103 | Active |
| US7132323B2 | CMOS well structure and method of forming the same | Electricity | 98 | Expired |
| US8637359B2 | Fin-last replacement metal gate FinFET process | Electricity | 64 | Active |
| US9287362B1 | Vertical field effect transistors with controlled overlap between gate electrode and source/drain contacts | Electricity | 52 | Active |
| US9312383B1 | Self-aligned contacts for vertical field effect transistors | Electricity | 38 | Active |
| US5858866A | Geometrical control of device corner threshold | Emerging Cross-Sectional Technologies | 28 | Expired |
| US7018873B2 | Method of making a device threshold control of front-gate silicon-on-insulator MOSFET using a self-aligned back-gate | Electricity | 26 | Expired |
| US8441084B2 | Horizontal polysilicon-germanium heterojunction bipolar transistor | Electricity | 26 | Active |
| US8455932B2 | Local interconnect structure self-aligned to gate structure | Electricity | 24 | Active |
| US7273785B2 | Method to control device threshold of SOI MOSFET's | Electricity | 23 | Expired |
| US8455313B1 | Method for fabricating finFET with merged fins and vertical silicide | Electricity | 22 | Active |
| US8247895B2 | 4D device process and structure | Electricity | 21 | Active |
| US6812527B2 | Method to control device threshold of SOI MOSFET's | Electricity | 20 | Expired |
| US6664598B1 | Polysilicon back-gated SOI MOSFET for dynamic threshold voltage control | Electricity | 19 | Expired |
| US8080838B2 | Contact scheme for FINFET structures with multiple FINs | Electricity | 16 | Active |
| US8969965B2 | Fin-last replacement metal gate FinFET | Electricity | 16 | Active |
| US8860107B2 | FinFET-compatible metal-insulator-metal capacitor | Electricity | 16 | Active |
| US6815296B2 | Polysilicon back-gated SOI MOSFET for dynamic threshold voltage control | Electricity | 13 | Expired |
| US8592280B2 | Fin field effect transistor devices with self-aligned source and drain regions | Emerging Cross-Sectional Technologies | 13 | Active |
| US8531001B2 | Complementary bipolar inverter | Electricity | 12 | Active |
| US9397226B2 | Vertical field effect transistors with controlled overlap between gate electrode and source/drain contacts | Electricity | 12 | Active |
| US7479418B2 | Methods of applying substrate bias to SOI CMOS circuits | Electricity | 11 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.