Inventor · Flower Mound, TX, US

Christopher Daniel Manack

48Patents
2h-index
33Co-inventors
53Inventor score

Filing activity: Mar 17, 2009 → Mar 26, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US8866237B2 Methods for embedding controlled-cavity MEMS package in integration board Electricity 5 Active
US10453817B1 Zinc-cobalt barrier for interface in solder bond applications Electricity 4 Active
US7919842B2 Structure and method for sealing cavity of micro-electro-mechanical device Electricity 2 Active
US11562949B2 Semiconductor package including undermounted die with exposed backside metal Electricity 2 Active
US11380637B2 Efficient redistribution layer topology Electricity 1 Active
US11387155B2 IC having a metal ring thereon for stress reduction Electricity 1 Active
US10566267B2 Die attach surface copper layer with protective layer for microelectronic devices Electricity 1 Active
US11410947B2 Brass-coated metals in flip-chip redistribution layers Electricity 0 Active
US11121076B2 Semiconductor die with conversion coating Electricity 0 Active
US9321631B2 Method for embedding controlled-cavity MEMS package in integration board Electricity 0 Active
US12255115B2 Electronic devices in semiconductor package cavities Electricity 0 Active
US10607931B2 Semiconductor device with electroplated die attach Electricity 0 Active
US11443996B2 Zinc layer for a semiconductor die pillar Electricity 0 Active
US11837518B2 Coated semiconductor dies Electricity 0 Active
US11127515B2 Nanostructure barrier for copper wire bonding Electricity 0 Active
US12100678B2 Conductive members for die attach in flip chip packages Electricity 0 Active
US12074096B2 Die attach surface copper layer with protective layer for microelectronic devices Electricity 0 Active
US12142586B2 Efficient redistribution layer topology Electricity 0 Active
US11854922B2 Semicondutor package substrate with die cavity and redistribution layer Electricity 0 Active
US11869820B2 IC having a metal ring thereon for stress reduction Electricity 0 Active
US10629334B2 Nanostructure barrier for copper wire bonding Electricity 0 Active
US11664276B2 Front side laser-based wafer dicing Performing Operations; Transporting 0 Active
US10833036B2 Interconnect for electronic device Electricity 0 Active
US10692830B2 Multilayers of nickel alloys as diffusion barrier layers Electricity 0 Active
US12009319B2 Integrated circuit with metal stop ring outside the scribe seal Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.