Davide Chiola
26Patents
8h-index
18Co-inventors
68Inventor score
Filing activity: Jul 11, 2002 → Jan 18, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6987305B2 | Integrated FET and schottky device | Electricity | 61 | Expired |
| US6846729B2 | Process for counter doping N-type silicon in Schottky device Ti silicide barrier | Electricity | 50 | Expired |
| US6855593B2 | Trench Schottky barrier diode | Emerging Cross-Sectional Technologies | 49 | Expired |
| US6977208B2 | Schottky with thick trench bottom and termination oxide and process for manufacture | Electricity | 15 | Expired |
| US7323402B2 | Trench Schottky barrier diode with differential oxide thickness | Emerging Cross-Sectional Technologies | 12 | Expired |
| US7196397B2 | Termination design with multiple spiral trench rings | Electricity | 12 | Expired |
| US7973381B2 | Thick field oxide termination for trench schottky device | Electricity | 11 | Expired |
| US7858456B2 | Merged P-i-N Schottky structure | Electricity | 10 | Expired |
| US7754550B2 | Process for forming thick oxides on Si or SiC for semiconductor devices | Electricity | 5 | Expired |
| US8143655B2 | Trench schottky barrier diode with differential oxide thickness | Emerging Cross-Sectional Technologies | 5 | Active |
| US6927141B2 | Process for forming fast recovery diode with a single large area P/N junction | Electricity | 4 | Expired |
| US7466005B2 | Recessed termination for trench schottky device without junction curvature | Electricity | 4 | Expired |
| US6930371B2 | Temperature-sensing diode | Electricity | 3 | Expired |
| US8766430B2 | Semiconductor modules and methods of formation thereof | Electricity | 2 | Active |
| US7510953B2 | Integrated fet and schottky device | Electricity | 2 | Expired |
| US7071525B2 | Merged P-i-N schottky structure | Electricity | 2 | Expired |
| US8003456B2 | Method for producing a semiconductor component | Electricity | 1 | Active |
| US8304305B2 | Semiconductor component | Electricity | 1 | Active |
| US6991943B2 | Process for preparation of semiconductor wafer surface | Electricity | 1 | Expired |
| US10109544B2 | Baseplate for an electronic module | Electricity | 0 | Active |
| US9716018B2 | Method of manufacturing baseplate for an electronic module | Electricity | 0 | Active |
| US9305874B2 | Baseplate for an electronic module and method of manufacturing the same | Electricity | 0 | Active |
| US7091572B2 | Fast recovery diode with a single large area p/n junction | Electricity | 0 | Expired |
| US7655977B2 | Trench IGBT for highly capacitive loads | Electricity | 0 | Active |
| US9865749B1 | Merged P-i-N Schottky structure | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.