Michael A. Gribelyuk
28Patents
9h-index
78Co-inventors
78Inventor score
Filing activity: Jul 19, 2000 → Aug 9, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7071103B2 | Chemical treatment to retard diffusion in a semiconductor overlayer | Electricity | 120 | Expired |
| US6982230B2 | Deposition of hafnium oxide and/or zirconium oxide and fabrication of passivated electronic structures | Electricity | 65 | Expired |
| US6991979B2 | Method for avoiding oxide undercut during pre-silicide clean for thin spacer FETs | Electricity | 46 | Expired |
| US6511876B2 | High mobility FETS using A1203 as a gate oxide | Electricity | 46 | Expired |
| US7279413B2 | High-temperature stable gate structure with metallic electrode | Electricity | 46 | Expired |
| US6413386B1 | Reactive sputtering method for forming metal-silicon layer | Chemistry; Metallurgy | 18 | Expired |
| US7754594B1 | Method for tuning the threshold voltage of a metal gate and high-k device | Electricity | 16 | Active |
| US6573197B2 | Thermally stable poly-Si/high dielectric constant material interfaces | Electricity | 15 | Expired |
| US11495741B2 | Bismuth antimony alloys for use as topological insulators | Physics | 11 | Active |
| US7115959B2 | Method of forming metal/high-k gate stacks with high mobility | Electricity | 7 | Expired |
| US8383483B2 | High performance CMOS circuits, and methods for fabricating same | Electricity | 7 | Active |
| US7683418B2 | High-temperature stable gate structure with metallic electrode | Electricity | 6 | Active |
| US7015469B2 | Electron holography method | Electricity | 5 | Expired |
| US8288237B2 | TiC as a thermally stable p-metal carbide on high k SiO2 gate stacks | Electricity | 5 | Active |
| US7667277B2 | TiC as a thermally stable p-metal carbide on high k SiO2 gate stacks | Electricity | 4 | Expired |
| US7436034B2 | Metal oxynitride as a pFET material | Electricity | 4 | Active |
| US7776701B2 | Metal oxynitride as a pFET material | Electricity | 4 | Active |
| US7521345B2 | High-temperature stable gate structure with metallic electrode | Electricity | 3 | Active |
| US7091128B2 | Method for avoiding oxide undercut during pre-silicide clean for thin spacer FETs | Electricity | 3 | Expired |
| US11763973B2 | Buffer layers and interlayers that promote BiSbx (012) alloy orientation for SOT and MRAM devices | Physics | 1 | Active |
| US8153514B2 | Method of forming metal/high-κ gate stacks with high mobility | Electricity | 0 | Active |
| US11875827B2 | SOT reader using BiSb topological insulator | Physics | 0 | Active |
| US12106791B2 | Doped BiSb (012) or undoped BiSb (001) topological insulator with GeNiFe buffer layer and/or interlayer for SOT based sensor, memory, and storage devices | Electricity | 0 | Active |
| US7232774B2 | Polycrystalline silicon layer with nano-grain structure and method of manufacture | Electricity | 0 | Expired |
| US12125512B2 | Doping process to refine grain size for smoother BiSb film surface | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.