Somnath Nag
29Patents
11h-index
49Co-inventors
75Inventor score
Filing activity: Feb 21, 1997 → Apr 7, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6204200A | Process scheme to form controlled airgaps between interconnect lines to reduce capacitance | Electricity | 264 | Expired |
| US6214719A | Method of implementing air-gap technology for low capacitance ILD in the damascene scheme | Electricity | 66 | Expired |
| US6417092B1 | Low dielectric constant etch stop films | Electricity | 58 | Expired |
| US6313010A | Integrated circuit insulator and method | Emerging Cross-Sectional Technologies | 40 | Expired |
| US5909628A | Reducing non-uniformity in a refill layer thickness for a semiconductor device | Emerging Cross-Sectional Technologies | 36 | Expired |
| US6297125A | Air-bridge integration scheme for reducing interconnect delay | Electricity | 25 | Expired |
| US6127285A | Interlevel dielectrics with reduced dielectric constant | Electricity | 23 | Expired |
| US7713881B2 | Process sequence for doped silicon fill of deep trenches | Electricity | 15 | Active |
| US7786376B2 | High efficiency solar cells and manufacturing methods | Emerging Cross-Sectional Technologies | 15 | Active |
| US6764952B1 | Systems and methods to retard copper diffusion and improve film adhesion for a dielectric barrier on copper | Emerging Cross-Sectional Technologies | 13 | Expired |
| US7446366B2 | Process sequence for doped silicon fill of deep trenches | Electricity | 13 | Active |
| US8241940B2 | Double-sided reusable template for fabrication of semiconductor substrates for photovoltaic cell and microelectronics device manufacturing | Emerging Cross-Sectional Technologies | 10 | Active |
| US7109097B2 | Process sequence for doped silicon fill of deep trenches | Electricity | 9 | Expired |
| US6268297A | Self-planarizing low-temperature doped-silicate-glass process capable of gap-filling narrow spaces | Electricity | 8 | Expired |
| US6306725A | In-situ liner for isolation trench side walls and method | Electricity | 8 | Expired |
| US6143625A | Protective liner for isolation trench side walls and method | Emerging Cross-Sectional Technologies | 7 | Expired |
| US8999058B2 | High-productivity porous semiconductor manufacturing equipment | Emerging Cross-Sectional Technologies | 3 | Active |
| US8926803B2 | Porous silicon electro-etching system and method | Emerging Cross-Sectional Technologies | 3 | Active |
| US8883552B2 | MWT architecture for thin SI solar cells | Emerging Cross-Sectional Technologies | 3 | Active |
| US6962883B2 | Integrated circuit insulator and method | Electricity | 2 | Expired |
| US9455360B2 | Method of fabricating a metal wrap through solar cell | Emerging Cross-Sectional Technologies | 0 | Active |
| US9093323B2 | Methods for selectively coating three-dimensional features on a substrate | Emerging Cross-Sectional Technologies | 0 | Active |
| US8445314B2 | Method of creating reusable template for detachable thin film substrate | Emerging Cross-Sectional Technologies | 0 | Active |
| US9401276B2 | Apparatus for forming porous silicon layers on at least two surfaces of a plurality of silicon templates | Emerging Cross-Sectional Technologies | 0 | Active |
| US6424040B1 | Integration of fluorinated dielectrics in multi-level metallizations | Electricity | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.