Inventor · Taipei, TW

Janmye Sung

34Patents
17h-index
23Co-inventors
77Inventor score

Filing activity: Sep 29, 1989 → Dec 6, 1999

Most-cited inventions

PatentTitleAreaCited byStatus
US5943581A Method of fabricating a buried reservoir capacitor structure for high-density dynamic random access memory (DRAM) circuits Electricity 266 Expired
US5858831A Process for fabricating a high performance logic and embedded dram devices on a single semiconductor chip Electricity 83 Expired
US5550078A Reduced mask DRAM process Electricity 62 Expired
US6008084A Method for fabricating low resistance bit line structures, along with bit line structures exhibiting low bit line to bit line coupling capacitance Electricity 50 Expired
US5879986A Method for fabrication of a one gigabit capacitor over bit line DRAM cell with an area equal to eight times the used minimum feature Electricity 48 Expired
US6136643A Method for fabricating capacitor-over-bit-line dynamic random access memory (DRAM) using self-aligned contact etching technology Electricity 46 Expired
US5559360A Inductor for high frequency circuits Electricity 46 Expired
US5547893A method for fabricating an embedded vertical bipolar transistor and a memory cell Electricity 46 Expired
US5153145A FET with gate spacer Electricity 46 Expired
US5470783A Method for integrated circuit device isolation Emerging Cross-Sectional Technologies 42 Expired
US5792680A Method of forming a low cost DRAM cell with self aligned twin tub CMOS devices and a pillar shaped capacitor Electricity 29 Expired
US6008085A Design and a novel process for formation of DRAM bit line and capacitor node contacts Electricity 29 Expired
US6180453A Method to fabricate a DRAM cell with an area equal to five times the minimum used feature, squared Electricity 29 Expired
US5679589A FET with gate spacer Electricity 25 Expired
US5821142A Method for forming a capacitor with a multiple pillar structure Emerging Cross-Sectional Technologies 24 Expired
US5753551A Memory cell array with a self-aligned, buried bit line Electricity 24 Expired
US5789291A Dram cell capacitor fabrication method Electricity 21 Expired
US6137130A Capacitor over bit line structure using a straight bit line shape Electricity 14 Expired
US5573962A Low cycle time CMOS process Electricity 14 Expired
US6025227A Capacitor over bit line structure using a straight bit line shape Electricity 13 Expired
US5002898A Integrated-circuit device isolation Electricity 12 Expired
US4999317A Metallization processing Electricity 12 Expired
US5808335A Reduced mask DRAM process Electricity 12 Expired
US5353245A Memory integrated circuit with balanced resistance Emerging Cross-Sectional Technologies 10 Expired
US5879997A Method for forming self aligned polysilicon contact Electricity 9 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.