Inventor · Mechanicville, NY, US

Kandabara Tapily

88Patents
9h-index
57Co-inventors
73Inventor score

Filing activity: Feb 11, 2015 → Nov 28, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US10522343B2 Method of enhancing high-k film nucleation rate and electrical mobility in a semiconductor device by microwave plasma treatment Electricity 36 Active
US10847363B2 Method of selective deposition for forming fully self-aligned vias Electricity 34 Active
US10586765B2 Buried power rails Electricity 31 Active
US9997598B2 Three-dimensional semiconductor device and method of fabrication Electricity 21 Active
US10833078B2 Semiconductor apparatus having stacked gates and method of manufacture thereof Electricity 16 Active
US10529830B2 Extension region for a semiconductor device Electricity 12 Active
US10770479B2 Three-dimensional device and method of forming the same Electricity 9 Active
US9893161B2 Parasitic capacitance reduction structure for nanowire transistors and method of manufacturing Electricity 9 Active
US10727057B2 Platform and method of operating for integrated end-to-end self-aligned multi-patterning process Electricity 9 Active
US10453749B2 Method of forming a self-aligned contact using selective SiO2 deposition Electricity 7 Active
US10049913B2 Methods for SiO2 filling of fine recessed features and selective SiO2 deposition on catalytic surfaces Electricity 7 Active
US10378105B2 Selective deposition with surface treatment Electricity 7 Active
US10916472B2 Self-aware and correcting heterogenous platform incorporating integrated semiconductor processing modules and method for using same Emerging Cross-Sectional Technologies 6 Active
US10068764B2 Selective metal oxide deposition using a self-assembled monolayer surface pretreatment Electricity 5 Active
US11114381B2 Power distribution network for 3D logic and memory Electricity 5 Active
US9882026B2 Method for forming a nanowire structure Electricity 4 Active
US10930764B2 Extension region for a semiconductor device Electricity 4 Active
US11456212B2 Platform and method of operating for integrated end-to-end fully self-aligned interconnect process Emerging Cross-Sectional Technologies 3 Active
US10014213B2 Selective bottom-up metal feature filling for interconnects Electricity 3 Active
US11264274B2 Reverse contact and silicide process for three-dimensional logic devices Electricity 3 Active
US10283369B2 Atomic layer etching using a boron-containing gas and hydrogen fluoride gas Electricity 3 Active
US11101173B2 Self-aware and correcting heterogenous platform incorporating integrated semiconductor processing modules and method for using same Emerging Cross-Sectional Technologies 3 Active
US9984890B2 Isotropic silicon and silicon-germanium etching with tunable selectivity Electricity 3 Active
US10453681B2 Method of selective vertical growth of a dielectric material on a dielectric substrate Electricity 2 Active
US10734278B2 Method of protecting low-K layers Electricity 2 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.