Inventor · Crolles, FR

Yannick Le Tiec

22Patents
3h-index
16Co-inventors
52Inventor score

Filing activity: Aug 13, 2009 → Dec 4, 2015

Most-cited inventions

PatentTitleAreaCited byStatus
US9105691B2 Contact isolation scheme for thin buried oxide substrate devices Electricity 9 Active
US9570465B2 Dual STI integrated circuit including FDSOI transistors and method for manufacturing the same Electricity 6 Active
US9601511B2 Low leakage dual STI integrated circuit including FDSOI transistors Electricity 4 Active
US8530331B2 Process for assembling substrates with low-temperature heat treatments Emerging Cross-Sectional Technologies 2 Active
US9337350B2 Transistor with reduced parasitic capacitance and access resistance of the source and drain, and method of fabrication of the same Electricity 2 Active
US9076732B2 Method to prepare semi-conductor device comprising a selective etching of a silicium—germanium layer Electricity 1 Active
US8969966B2 Defective P-N junction for backgated fully depleted silicon on insulator MOSFET Electricity 1 Active
US8987854B2 Microelectronic device with isolation trenches extending under an active area Electricity 1 Active
US9236478B2 Method for manufacturing a fin MOS transistor Electricity 1 Active
US9214515B2 Method for making a semiconductor structure with a buried ground plane Electricity 1 Active
US9437474B2 Method for fabricating microelectronic devices with isolation trenches partially formed under active regions Electricity 0 Active
US9070709B2 Method for producing a field effect transistor with implantation through the spacers Electricity 0 Active
US9373507B2 Defective P-N junction for backgated fully depleted silicon on insulator mosfet Electricity 0 Active
US9673329B2 Method for manufacturing a fin MOS transistor Electricity 0 Active
US9231062B2 Method for treating the surface of a silicon substrate Emerging Cross-Sectional Technologies 0 Active
US8501588B2 Method for making a semiconductor structure with a buried ground plane Electricity 0 Active
US8722499B2 Method for fabricating a field effect device with weak junction capacitance Electricity 0 Active
US8994142B2 Field effect transistor with offset counter-electrode contact Electricity 0 Active
US8877618B2 Method for producing a field effect transistor with a SiGe channel by ion implantation Electricity 0 Active
US9059041B2 Dual channel hybrid semiconductor-on-insulator semiconductor devices Electricity 0 Active
US9293474B2 Dual channel hybrid semiconductor-on-insulator semiconductor devices Electricity 0 Active
US8735259B2 Method of producing insulation trenches in a semiconductor on insulator substrate Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.