Inventor · Voiron, FR

Laurent Grenouillet

58Patents

6h-index

61Co-inventors

71Inventor score

Filing activity: Oct 20, 2008 → Nov 2, 2022

Most-cited inventions

Patent	Title	Area	Cited by	Status
US8487340B2	Optoelectronic device based on nanowires and corresponding processes	Electricity	25	Active
US8969148B2	Method for producing a transistor structure with superimposed nanowires and with a surrounding gate	Emerging Cross-Sectional Technologies	15	Active
US9105691B2	Contact isolation scheme for thin buried oxide substrate devices	Electricity	9	Active
US9831288B2	Integrated circuit cointegrating a FET transistor and a RRAM memory point	Electricity	7	Active
US9252208B1	Uniaxially-strained FD-SOI finFET	Electricity	7	Active
US9570465B2	Dual STI integrated circuit including FDSOI transistors and method for manufacturing the same	Electricity	6	Active
US9634103B2	CMOS in situ doped flow with independently tunable spacer thickness	Electricity	4	Active
US9601511B2	Low leakage dual STI integrated circuit including FDSOI transistors	Electricity	4	Active
US9570340B2	Method of etching a crystalline semiconductor material by ion implantation and then chemical etching based on hydrogen chloride	Electricity	4	Active
US9502558B2	Local strain generation in an SOI substrate	Electricity	4	Active
US8890219B2	UTBB CMOS imager having a diode junction in a photosensitive area thereof	Electricity	3	Active
US9601352B2	Method of localized annealing of semi-conducting elements using a reflective area	Emerging Cross-Sectional Technologies	2	Active
US8676002B2	Method of producing a photonic device and corresponding photonic device	Physics	2	Active
US10347721B2	Method to increase strain in a semiconductor region for forming a channel of the transistor	Electricity	2	Active
US9337350B2	Transistor with reduced parasitic capacitance and access resistance of the source and drain, and method of fabrication of the same	Electricity	2	Active
US10014183B2	Method for patterning a thin film	Electricity	2	Active
US9425051B2	Method for producing a silicon-germanium film with variable germanium content	Electricity	2	Active
US9935019B2	Method of fabricating a transistor channel structure with uniaxial strain	Electricity	2	Active
US11264479B2	Process for producing FET transistors	Electricity	1	Active
US9711567B2	Process for fabricating an integrated circuit cointegrating a FET transistor and an OxRAM memory location	Electricity	1	Active
US9911820B2	Method for fabrication of a field-effect with reduced stray capacitance	Electricity	1	Active
US10347545B2	Method for producing on the same transistors substrate having different characteristics	Electricity	1	Active
US8987854B2	Microelectronic device with isolation trenches extending under an active area	Electricity	1	Active
US9076732B2	Method to prepare semi-conductor device comprising a selective etching of a silicium—germanium layer	Electricity	1	Active
US8472493B2	Hybrid laser coupled to a waveguide	Electricity	1	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.