Yangyin Chen
23Patents
6h-index
16Co-inventors
58Inventor score
Filing activity: Mar 30, 2016 → Dec 6, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9941299B1 | Three-dimensional ferroelectric memory device and method of making thereof | Physics | 62 | Active |
| US10038092B1 | Three-level ferroelectric memory cell using band alignment engineering | Electricity | 33 | Active |
| US9735202B1 | Implementation of VMCO area switching cell to VBL architecture | Electricity | 15 | Active |
| US9754665B2 | Vacancy-modulated conductive oxide resistive RAM device including an interfacial oxygen source layer | Physics | 14 | Active |
| US10559588B2 | Three-dimensional flat inverse NAND memory device and method of making the same | Physics | 14 | Active |
| US9768180B1 | Methods and apparatus for three-dimensional nonvolatile memory | Electricity | 10 | Active |
| US11037908B2 | Bonded die assembly containing partially filled through-substrate via structures and methods for making the same | Electricity | 5 | Active |
| US11094653B2 | Bonded assembly containing a dielectric bonding pattern definition layer and methods of forming the same | Electricity | 4 | Active |
| US10109679B2 | Wordline sidewall recess for integrating planar selector device | Electricity | 3 | Active |
| US11348901B1 | Interfacial tilt-resistant bonded assembly and methods for forming the same | Electricity | 3 | Active |
| US10453861B1 | Ferroelectric non-volatile memory | Electricity | 2 | Active |
| US11869877B2 | Bonded assembly including inter-die via structures and methods for making the same | Electricity | 2 | Active |
| US11424215B2 | Bonded assembly formed by hybrid wafer bonding using selectively deposited metal liners | Electricity | 2 | Active |
| US10461095B2 | Ferroelectric non-volatile memory | Electricity | 1 | Active |
| US10734408B2 | Ferroelectric non-volatile memory | Electricity | 1 | Active |
| US10453862B1 | Ferroelectric non-volatile memory | Electricity | 1 | Active |
| US11239204B2 | Bonded assembly containing laterally bonded bonding pads and methods of forming the same | Electricity | 0 | Active |
| US10026782B2 | Implementation of VMCO area switching cell to VBL architecture | Electricity | 0 | Active |
| US12347804B2 | Bonded assembly including interconnect-level bonding pads and methods of forming the same | Electricity | 0 | Active |
| US9941331B1 | Device with sub-minimum pitch and method of making | Electricity | 0 | Active |
| US10756186B2 | Three-dimensional memory device including germanium-containing vertical channels and method of making the same | Electricity | 0 | Active |
| US11276705B2 | Embedded bonded assembly and method for making the same | Electricity | 0 | Active |
| US11430745B2 | Semiconductor die containing silicon nitride stress compensating regions and method for making the same | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.