Chia-Chung Wang
104Patents
12h-index
15Co-inventors
83Inventor score
Filing activity: Aug 30, 1995 → Aug 22, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6590282B1 | Stacked semiconductor package formed on a substrate and method for fabrication | Electricity | 107 | Expired |
| US8525214B2 | Semiconductor chip assembly with post/base heat spreader with thermal via | Electricity | 54 | Active |
| US7446419B1 | Semiconductor chip assembly with welded metal pillar of stacked metal balls | Electricity | 29 | Active |
| US6876072B1 | Semiconductor chip assembly with chip in substrate cavity | Electricity | 29 | Expired |
| US7494843B1 | Method of making a semiconductor chip assembly with thermal conductor and encapsulant grinding | Electricity | 17 | Active |
| US7948076B2 | Semiconductor chip assembly with post/base heat spreader and vertical signal routing | Electricity | 16 | Active |
| US8865525B2 | Method of making cavity substrate with built-in stiffener and cavity substrate manufactured thereby | Emerging Cross-Sectional Technologies | 15 | Active |
| US7319265B1 | Semiconductor chip assembly with precision-formed metal pillar | Electricity | 14 | Active |
| US8129742B2 | Semiconductor chip assembly with post/base heat spreader and plated through-hole | Electricity | 13 | Active |
| US6872591B1 | Method of making a semiconductor chip assembly with a conductive trace and a substrate | Electricity | 13 | Expired |
| US7656031B2 | Stackable semiconductor package having metal pin within through hole of package | Electricity | 12 | Active |
| US8003415B2 | Method of making a semiconductor chip assembly with a post/base heat spreader and vertical signal routing | Electricity | 12 | Active |
| US10420204B2 | Wiring board having electrical isolator and moisture inhibiting cap incorporated therein and method of making the same | Electricity | 10 | Active |
| US9318411B2 | Semiconductor package with package-on-package stacking capability and method of manufacturing the same | Electricity | 10 | Active |
| US7075186B1 | Semiconductor chip assembly with interlocked contact terminal | Emerging Cross-Sectional Technologies | 9 | Expired |
| US5583263A | Process of making ketones | Chemistry; Metallurgy | 9 | Expired |
| US9209154B2 | Semiconductor package with package-on-package stacking capability and method of manufacturing the same | Electricity | 8 | Active |
| US7811863B1 | Method of making a semiconductor chip assembly with metal pillar and encapsulant grinding and heat sink attachment | Electricity | 8 | Active |
| US7414319B2 | Semiconductor chip assembly with metal containment wall and solder terminal | Emerging Cross-Sectional Technologies | 8 | Active |
| US6444561B1 | Method for forming solder bumps for flip-chip bonding by using perpendicularly laid masking strips | Electricity | 8 | Expired |
| US8076182B2 | Method of making a semiconductor chip assembly with a post/base heat spreader and a cavity over the post | Electricity | 8 | Active |
| US10134711B2 | Thermally enhanced semiconductor assembly with three dimensional integration and method of making the same | Electricity | 8 | Active |
| US8324723B2 | Semiconductor chip assembly with bump/base heat spreader and dual-angle cavity in bump | Electricity | 7 | Active |
| US8324653B1 | Semiconductor chip assembly with ceramic/metal substrate | Electricity | 7 | Active |
| US7419851B2 | Method of making a semiconductor chip assembly with a metal containment wall and a solder terminal | Emerging Cross-Sectional Technologies | 7 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.